The World First PCIe 4.0×4 Controller, Phison PS5016-E16 controller, made by 28nm manufacturing technology. The advanced fabrication process ensures PS5016-E16 has enough compute power for ECC processing when adopting the latest 3D TLC NAND flash. PS5016-E16 also features eight NAND channels with 32 CE targets, DDR4 DRAM caching, and a PCIe 4.0×4 interface. As for features, the chip supports the NVMe 1.3 protocol, LDPC error correction, and Wear Leveling, Over-Provision technologies to improve reliability and durability of SSDs. 
- PCIe 4.0×4, NVMe 1.3 Interface
- DDR4 DRAM cache
- 8 CH with 32 CEs
- Phison 4th Gen LDPC & RAID ECC
- Support Pyrite
- Heat spreader for controller
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InterfacePCI-Express 4.0×4, NVMe 1.3
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Form FactorM.2 2280
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Total Capacity2000GB
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WarrantyLimited 5-years or 3600TBW
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NAND3D TLC Toshiba BiCS4
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External DDR CacheDDR4 2GB
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Sequential Read speedUp to 5000 MB/s
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Sequential Write speedUp to 4400 MB/s
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Random Read IOPSup to 750k
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Random Write IOPSup to 700k
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Dimension80.5 x 11.4 x 23.5 mm
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Mean time between failure (MTBF)1.77 million hours
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Power Consumption (Active)Average: R : 6.5W; W : 6.6W
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Power Consumption (Idle)21.1mw
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Temperature (Operating)0°C to 70°C
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Temperature (Storage)-40°C to 85°C
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Note* Test system configuration: configuration may vary by models, we will choose the latest platform for verification.
* Performance may vary based on SSD’s firmware version and system hardware & configuration. Sequential performance measurements based on CrystalDiskMark v.5.1.2 and I0meter 1.1.0.
* Speeds based on internal testing. Actual performance may vary.
* TBW (Terabyte Written):Terabytes Written” is the total amount of data that can be written into an SSD before it is likely to fail.
* 1GB = 1 billion bytes. Actual useable capacity may vary.
* 5 years or 3600TBW, whichever comes first.
* The entire materials provided herein are for reference only. GIGABYTE reserves the right to modify or revise the content at anytime without prior notice.
* Advertised performance is based on maximum theoretical interface values from respective Chipset vendors or organization who defined the interface specification. Actual performance may vary by system configuration.
* All trademarks and logos are the properties of their respective holders.
* Due to standard PC architecture, a certain amount of memory is reserved for system usage and therefore the actual memory size is less than the stated amount.
* Advertised performance is based on maximum theoretical interface values from respective Chipset vendors or organization who defined the interface specification. Actual performance may vary by system configuration.
* All trademarks and logos are the properties of their respective holders.
* Due to standard PC architecture, a certain amount of memory is reserved for system usage and therefore the actual memory size is less than the stated amount.
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